LCOV - code coverage report

Current view: top level - src/test - txrequest_tests.cpp (source / functions) Hit Total Coverage Test: fuzz_coverage.info Lines: 0 431 0.0 % Date: 2023-10-05 12:38:51 Functions: 0 60 0.0 % Branches: 0 0 -

Function Name	Hit count
_ZN15txrequest_tests12_GLOBAL__N_112RandomTime1yEv	0
_ZN15txrequest_tests12_GLOBAL__N_112RandomTime8sEv	0
_ZN15txrequest_tests12_GLOBAL__N_114BuildWtxidTestERNS0_8ScenarioEi	0
_ZN15txrequest_tests12_GLOBAL__N_115BuildSingleTestERNS0_8ScenarioEi	0
_ZN15txrequest_tests12_GLOBAL__N_117BuildPriorityTestERNS0_8ScenarioEi	0
_ZN15txrequest_tests12_GLOBAL__N_120BuildBigPriorityTestERNS0_8ScenarioEi	0
_ZN15txrequest_tests12_GLOBAL__N_121BuildRequestOrderTestERNS0_8ScenarioEi	0
_ZN15txrequest_tests12_GLOBAL__N_122BuildTimeBackwardsTestERNS0_8ScenarioE	0
_ZN15txrequest_tests12_GLOBAL__N_122BuildWeirdRequestsTestERNS0_8ScenarioE	0
_ZN15txrequest_tests12_GLOBAL__N_124TestInterleavedScenariosEv	0
_ZN15txrequest_tests12_GLOBAL__N_16RunnerC2Ev	0
_ZN15txrequest_tests12_GLOBAL__N_16RunnerD2Ev	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario11AdvanceTimeENSt6chrono8durationIlSt5ratioILl1ELl1000000EEEE	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario11ReceivedInvElRK7GenTxidbNSt6chrono8durationIlSt5ratioILl1ELl1000000EEEE	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario11RequestedTxElRK7uint256NSt6chrono8durationIlSt5ratioILl1ELl1000000EEEE	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario11SetTestNameENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario12CheckExpiredEl7GenTxid	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario12ForgetTxHashERK7uint256	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario16DisconnectedPeerEl	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario16ReceivedResponseElRK7uint256	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario5CheckElRKSt6vectorI7GenTxidSaIS3_EEmmmRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEENSt6chrono8durationIlSt5ratioILl1ELl1000000EEEE	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario7NewPeerEv	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario8NewGTxidERKSt6vectorIS2_IlSaIlEESaIS4_EE	0
_ZN15txrequest_tests12_GLOBAL__N_18Scenario9NewTxHashERKSt6vectorIS2_IlSaIlEESaIS4_EE	0
_ZN15txrequest_tests12_GLOBAL__N_18ScenarioC2ERNS0_6RunnerENSt6chrono8durationIlSt5ratioILl1ELl1000000EEEE	0
_ZN15txrequest_tests12_GLOBAL__N_18ScenarioD2Ev	0
_ZN15txrequest_tests13TxRequestTest11test_methodEv	0
_ZN15txrequest_tests13TxRequestTestC2Ev	0
_ZN15txrequest_tests13TxRequestTestD2Ev	0
_ZN15txrequest_testsL21TxRequestTest_invokerEv	0
_ZNK15txrequest_tests12_GLOBAL__N_18Scenario3NowEv	0
_ZZN15txrequest_tests12_GLOBAL__N_124TestInterleavedScenariosEvENK3$_0clERNS0_8ScenarioE	0
_ZZN15txrequest_tests12_GLOBAL__N_124TestInterleavedScenariosEvENK3$_1clERNS0_8ScenarioE	0
_ZZN15txrequest_tests12_GLOBAL__N_124TestInterleavedScenariosEvENK3$_2clERNS0_8ScenarioE	0
_ZZN15txrequest_tests12_GLOBAL__N_124TestInterleavedScenariosEvENK3$_3clERNS0_8ScenarioE	0
_ZZN15txrequest_tests12_GLOBAL__N_124TestInterleavedScenariosEvENK3$_4clERNS0_8ScenarioE	0
_ZZN15txrequest_tests12_GLOBAL__N_124TestInterleavedScenariosEvENK3$_5clERNS0_8ScenarioE	0
_ZZN15txrequest_tests12_GLOBAL__N_124TestInterleavedScenariosEvENK3$_6clERNS0_8ScenarioE	0
_ZZN15txrequest_tests12_GLOBAL__N_124TestInterleavedScenariosEvENK3$_7clERKSt4pairINSt6chrono8durationIlSt5ratioILl1ELl1000000EEEESt8functionIFvvEEESD_	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario11ReceivedInvElRK7GenTxidbNSt6chrono8durationIlSt5ratioILl1ELl1000000EEEEENKUlvE_clEv	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario11RequestedTxElRK7uint256NSt6chrono8durationIlSt5ratioILl1ELl1000000EEEEENKUlvE_clEv	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario12CheckExpiredEl7GenTxidENKUlvE_clEv	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario12CheckExpiredEl7GenTxidENUlvE_C2EOS3_	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario12CheckExpiredEl7GenTxidENUlvE_C2ERKS3_	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario12CheckExpiredEl7GenTxidENUlvE_D2Ev	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario12ForgetTxHashERK7uint256ENKUlvE_clEv	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario16DisconnectedPeerElENKUlvE_clEv	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario16ReceivedResponseElRK7uint256ENKUlvE_clEv	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario5CheckElRKSt6vectorI7GenTxidSaIS3_EEmmmRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEENSt6chrono8durationIlSt5ratioILl1ELl1000000EEEEENKUlvE_clEv	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario5CheckElRKSt6vectorI7GenTxidSaIS3_EEmmmRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEENSt6chrono8durationIlSt5ratioILl1ELl1000000EEEEENUlvE_C2EOSL_	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario5CheckElRKSt6vectorI7GenTxidSaIS3_EEmmmRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEENSt6chrono8durationIlSt5ratioILl1ELl1000000EEEEENUlvE_C2ERKSL_	0
_ZZN15txrequest_tests12_GLOBAL__N_18Scenario5CheckElRKSt6vectorI7GenTxidSaIS3_EEmmmRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEENSt6chrono8durationIlSt5ratioILl1ELl1000000EEEEENUlvE_D2Ev	0
__cxx_global_var_init	0
__cxx_global_var_init.1	0
__cxx_global_var_init.10	0
__cxx_global_var_init.12	0
__cxx_global_var_init.2	0
__cxx_global_var_init.4	0
__cxx_global_var_init.6	0
__cxx_global_var_init.7	0

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